1. Field of the Invention
The present invention relates to an apparatus and method for detecting a correlation which outputs a correlation signal indicative of a correlation between a transmitted signal which has been spread in spectrum and a spread code signal, and a spectrum despread apparatus and receiver having the apparatus for detecting a correlation.
2. Description of the Prior Art
CDMA (Code Division Multiple Access) system attracts attention as a multiple access system in a mobile communication system including base stations and transmission/reception terminals as portable mobile stations, because the CDMA system has a possibility to drastically increase subscriber capacity. In the CDMA system, a signal to be transmitted is spread in spectrum with a spread code signal such as a M-sequence code signal and a Gold sequence code signal before transmission from a transmitting apparatus, which is a base station or a transmission/reception terminal, and a transmission signal received by a receiving apparatus, which is the transmission/reception terminal or the base station, is despread by the same spread code signal as the transmitting apparatus to produce a decoded signal.
In order to despread a transmission signal with a spread code signal in a spectrum despread apparatus of a receiving apparatus, it is necessary to generate a spread code signal having a sequence and phase which are the same as the transmission signal. The phase of the spread code signal which has spread the transmission signal is detected by detecting a peak timing of an output of a correlation detecting apparatus.
According to a signal format of a W-CDMA (Wideband Code Division Multiple Access) system proposed by ARIB (Association of Radio Industries and Businesses) as shown in FIG. 7, Perch Channel""s one frame having a period of 10 msec is divided into 16 slots and each slot is divided into 10 symbols. A Search Code is assigned to the first symbol of each slot. The Search Code is a code common among all the transmission/reception terminals and composed of 256 chips. A correlation detecting apparatus of each transmission/reception terminal outputs a correlation signal in one slot time at a minimum by using the Search Code. The correlation detecting apparatus outputs a correlation signal as shown in FIG. 8 as a phase detection signal. In addition, the correlation detecting apparatus oversamples each chip. An oversampling frequency thereof is, for example, a double or quadruple of a chip rate.
Formerly, the Search Code consisting of 256 chips was of 256 period. ARIB, however, has proposed the Search Code of Lxc3x97M period, where Lxc3x97M=256. The Search Code of Lxc3x97M period is a Search Code which repeats a spread signal of a period of L by M times. The values of L and M are integers larger than one. The values of L and M are, for example, 16 and 16, respectively. The Search code of Lxc3x97M is inverted or not inverted in a unit of the value of M in accordance with a prescribed rule. There may be an extreme rule which does not invert the Search Code at all.
The correlation detection apparatus proposed by ARIB, AIF/SWG2-28-18, Cell Search Scheme for 1st and 2nd stage, ST8 as shown in FIG. 9 Comprises L-Chip accumulator 901, shift register 902 consisting of D-type flip-flops as many as Lxc3x97(Mxe2x88x921)xc3x97N, adder 903 having inputs as many as M, and multiplier 904 as many as M.
L-chip accumulator 901 may be, for example, a matching filter or a correlator bank.
As shown in FIG. 6, a matching filter as an example of L-chip accumulator 901 comprises shift register 201 consisting of D-type flip-flops as many as (Lxe2x88x921)xc3x97N, multipliers 203 as many as L which multiply signals derived from every N-th taps of shift register 201 with coefficients xcex3i (i=1, 2, . . . , L), and adder 202 which sums up the outputs of multipliers 203. The matching filter takes a form of a transversal filter.
A bit width of an input of L-chip accumulator 901 is, for example, 8. A bit width of an output of L-chip accumulator 901 is 12 if the bit width of the input of L-chip accumulator 901 is 8 and the number L of inputs of adder 202 is 16.
Next, the operation of the correlation detecting apparatus will be explained with reference to FIGS. 6 and 9.
A transmission signal which has been oversampled into N samples per chip is inputted to L-chip accumulator 901. L-chip accumulator 901 adds/subtracts samples as many as L and outputs an intermediate correlation signal at each clock tick of the oversampling frequency.
The intermediate correlation signal and delayed intermediate correlation signals which are derived from every Lxc3x97N-th tap of shift register 902 are inputted to multipliers 904. The coefficients xcex2m (m=1, 2, . . . , M) of multipliers 904 are determined in accordance with the Search Code with Lxc3x97M period. Adder 904 sums up outputs of multipliers 904 to output the sum thereof as a final correlation signal.
However, the correlation detecting apparatus as shown in FIG. 9 has disadvantages as follows:
A first disadvantage is that shift register 902 is composed of a large number of D-type flip-flops as many as Lxc3x97(Mxe2x88x921)xc3x97N. This causes increase in circuit scale.
A second disadvantage is that input data and output data of D-type flip-flops as many as Lxc3x97(Mxe2x88x921)xc3x97N constituting shift register 902 change at each clock tick of the oversampling frequency. This causes increase in necessitative power consumption.
The above disadvantages are serious for a portable type of a transmission/reception terminal which operates with a battery if the correlation detecting apparatus of FIG. 9 is incorporated therein.
In order to overcome the aforementioned disadvantages, the present invention has been made and accordingly, has an object to provide a correlation detecting apparatus which outputs an accurate and reliable correlation signal and is reduced in circuit scale and power consumption.
The present invention has another object to provide a spectrum despread apparatus, receiving terminal, and transmitting/receiving apparatus, each of which has the correlation detecting apparatus which outputs an accurate and reliable correlation signal and is reduced in circuit scale and power consumption.
The present invention has further object to provide a correlation detecting method which outputs an accurate and reliable correlation signal and reduces circuit scale and power consumption.
According to a first aspect of the present invention, there is provided an apparatus for detecting a correlation of samples with a spread code, the samples being obtained by sampling a spectrum spread signal in a range of one symbol period with a oversampling rate which is N-fold of a chip rate, wherein N is an integer larger than zero, the spread code being of Lxc3x97M period per symbol, wherein L and M are integers larger than one, the spectrum spread signal having been spread in spectrum by the spread code signal, the apparatus comprising: an L-chip accumulator which inputs the samples to generate and output an intermediate correlation signal of a bit width of W, wherein W is an integer larger than one; memories as many as Mxe2x88x921, each of which has a data width of 2W bits and addresses as many as Lxc3x97N/2 and stores samples of the intermediate correlation signal as many as Lxc3x97N while combining two samples as one pair; an adder which has input terminals as many as M and inputs from one of the input terminals the intermediate correlation signal which is outputted from the L-chip accumulator and from the other of the input terminals the intermediate correlation signal which is outputted from a corresponding memory among the memories; and a controller which supplies the intermediate correlation signal outputted from the L-chip accumulator to the memories as many as Mxe2x88x921 in rotation with a unit of Lxc3x97N samples, and reads, and supplies to each of the other of the input terminals of the adder, the intermediate correlation signal which has been stored in each of the memories Mxe2x88x921 times; wherein an output of the adder is outputted as an correlation signal outputted from the apparatus.
The apparatus may further comprise: multipliers as many as Mxe2x88x921, each of which is connected with each of the memories and with each of the other of the input terminals of the adder; and a coefficient generator which generates coefficients of the multipliers; wherein each of the coefficients changes cyclically in a unit of Lxc3x97N-fold of a period corresponding to the oversampling rate.
The apparatus may further comprise: a multiplier connected with the L-chip accumulator and with the one of the input terminals of the adder.
The memories may be one-port type of memories.
The L-chip accumulator may be a matching filter or a correlator bank.
According to a second aspect of the present invention, there is provided an apparatus for detecting a correlation of samples with a spread code, the samples being obtained by sampling a spectrum spread signal in a range of one symbol period with a oversampling rate which is N-fold of a chip rate, wherein N is an integer larger than zero, the spread code being of Lxc3x97M period per symbol, wherein L and M are integers larger than one, the spectrum spread signal having been spread in spectrum by the spread code signal, the apparatus comprising: an L-chip accumulator which inputs the samples to generate and output an intermediate correlation signal of a bit width of W, wherein W is an integer larger than one; a plurality of memories, each of which stores samples of the intermediate correlation signal as many as Lxc3x97N while combining a plurality of samples as one group; an adder which has input terminals as many as M and inputs from one of the input terminals the intermediate correlation signal which is outputted from the L-chip accumulator and from the other of the input terminals the intermediate correlation signal which is outputted from a corresponding memory among the memories; and a controller which supplies the intermediate correlation signal outputted from the L-chip accumulator to the memories as many as Mxe2x88x921 in rotation with a unit of Lxc3x97N samples, and reads, and supplies to each of the other of the input terminals of the adder, the intermediate correlation signal which has been stored in each of the memories Mxe2x88x921 times; wherein an output of the adder is outputted as an correlation signal outputted from the apparatus.
According to a third aspect of the present invention, there is provided a spectrum despread apparatus, a reception terminal, and a transmission/reception terminal, each of which comprising the apparatus for detecting a correlation
According to a fourth aspect of the present invention, there is provided a method for detecting a correlation of samples with a spread code, the samples being obtained by sampling a spectrum spread signal in a range of one symbol period with a oversampling rate which is N-fold of a chip rate, wherein N is an integer larger than zero, the spread code being of Lxc3x97M period per symbol, wherein L and M are integers larger than one, the spectrum spread signal having been spread in spectrum by the spread code signal, the method comprising steps of: generating an intermediate correlation signal of a bit width of W by using the samples, wherein W is an integer larger than zero; writing samples of the intermediate correlation signal to memories as many as Mxe2x88x921 having data width of 2W bits and addresses as many as Lxc3x97N/2 in rotation with a unit of Lxc3x97N samples while combining two samples as one pair; supplying the samples of the intermediate correlation signal to one of input terminals as many as M of an adder; reading samples as many as Lxc3x97N of the intermediate correlation signal which have been stored in each of the memories Mxe2x88x921 times; supplying the samples read in the step of reading to the other of the input terminals of the adder; and outputting an output of the adder as a correlation signal.
The method may further comprises a step of multiplying the samples supplied to the one of the input terminals of the adder with a coefficient.
The method may further comprises a step of multiplying the samples supplied to each of the other of the input terminals of the adder with a coefficient which changes cyclically in a unit of Lxc3x97N-fold of a period corresponding to the oversampling rate.